This invention relates to implementation of a digital speech synthesis circuit onto a miniature electronic device or chip.
This invention is an improvement over the invention disclosed in U.S. Pat. No. 4,209,836, which is hereby incorporated by reference. The integrated circuit speech synthesis device disclosed in the referenced patent uses stored parameter codes of words or phrases as input data for speech synthesis, at a fixed frame rate. The frame rate is the speed at which data is synthesized to produce speech. Each frame contains parameter data pertaining to the sound which it partially represents. Since the frame rate in the referenced patented device is fixed, the output speech is, therefore, also fixed.
In a system which uses stored parameters of allophones rather than words and phrases, a fixed frame rate tends to produce a rather mechanical-sounding speech product. Stress and intonation patterns may be inserted by varying the frame rate from allophone to allophone. The variations in frame rate would have no effect on the pitch or naturalness of the speech.
It is an object of the present invention to provide a speech synthesis device which produces a more natural-sounding speech. Another object of the present invention is to provide a speech synthesis device which may find application in systems employing the allophone coding technique for speech construction in a speech synthesis system.